Memory management system and method

ABSTRACT

The memory management system ( 20 ) includes a transform generator ( 22 ) capable of generating an address ( 28 ) and a confirmer ( 30 ) from a key. A controller ( 24 ) is connected to the transform generator ( 22 ) and sends the key to the transform generator ( 22 ) and receives the address ( 28 ) and the confirmer ( 30 ). A store ( 26 ) is connected to the controller ( 24 ) and has a plurality of addresses ( 28 ), each of the plurality of addresses ( 28 ) has a confirmer location ( 30 ), a forward pointer location ( 34 ), a primary flag ( 36 ), an allocated flag ( 38 ) and an association location ( 32 ).

FIELD OF THE INVENTION

[0001] The present invention relates generally to the field of computermemories and more particularly to a memory management system and method.

BACKGROUND OF THE INVENTION

[0002] Most computer memory today uses Random Access Memory (RAM) tostore information. Each element of data has its own address. The CentralProcessing Unit (CPU) provides a singular address and can either read orwrite data at that location. This architecture is sequential in nature,requiring several processing steps to manipulate data because itslocation must be determined first.

[0003] An alternative method of managing data is with ContentAddressable Memory (CAM). In this method the CPU provides a data elementto the CAM and the CAM determines an address for the data element. CAMsare architecturally the inverse of RAMS. CAMs have typically been usedin applications requiring high bandwidth and low latency requirements.CAMs provide significant improvements over alternative RAM-based searchalgorithms such as binary/tree searches or look-aside tag buffers. CAMsare hardware devices and as a result require the designer to determinethe exact maximum key width and depth. Typical commercial CAMsemiconductor chips are 64 bits wide and 1024 bits deep. As a result,applications requiring more than a few thousand entries are prohibitivein cost, power consumption and on-board real-estate.

[0004] Another data management scheme is associative memories. Typicallyassociative memories use hash tables that return an arbitrary memorylocation for a data element. Hashing tables are commonly used in largedatabase applications. Unfortunately, hashing tables suffer from a largenumber of collisions as the memory store approaches 70% full. Thecollision management requires external memory management schemes thatrequire extra processing and memory space.

[0005] Thus there exists a need for a memory management system andmethod that overcomes these and other problems.

BRIEF DESCRIPTION OF THE DRAWINGS

[0006]FIG. 1 is a block diagram of a memory management system inaccordance with one embodiment of the invention;

[0007]FIG. 2 is a schematic diagram of a memory store in accordance withone embodiment of the invention;

[0008]FIG. 3 is a schematic diagram of a memory store in accordance withone embodiment of the invention;

[0009]FIG. 4 is a schematic diagram of a memory store in accordance withone embodiment of the invention;

[0010]FIG. 4 is a schematic diagram of a memory store in accordance withone embodiment of the invention;

[0011]FIG. 5 is a schematic diagram of a memory store in accordance withone embodiment of the invention;

[0012]FIG. 6 is a schematic diagram of a memory store in accordance withone embodiment of the invention;

[0013]FIG. 7 is a schematic diagram of a memory store in accordance withone embodiment of the invention;

[0014]FIG. 8 is a schematic diagram of a memory store in accordance withone embodiment of the invention;

[0015]FIG. 9 is a schematic diagram of a memory store in accordance withone embodiment of the invention; and

[0016]FIG. 10 is a schematic diagram of a memory store in accordancewith one embodiment of the invention.

DETAILED DESCRIPTION OF THE DRAWINGS

[0017] The memory management system includes a transform generatorcapable of generating an address and a confirmer from a key. Acontroller is connected to the transform generator and sends the key tothe transform generator and receives the address and the confirmer. Astore is connected to the controller and has a plurality of addresses.Each of the plurality of addresses has a confirmer location, a forwardpointer location, a primary flag, an allocated flag and an associationlocation. In one embodiment the transform generator is a linear feedbackshift register (polynomial code). In another embodiment, the transformgenerator is Cyclical Redundancy Code (CRC) generator. A portion of theresult from the generator is used as the address and a second portion isused as the confirmer. The memory management system described aboveprovides fast lookup capabilities since the data element (key)determines the address of the association. In addition, the probabilityof collisions is very low or nonexistent. This means that extendedlinked lists do not have to be searched. The memory management systemcan be implemented in software or in hardware. As a result the number ofentries and the width of the entries can be easily adjusted. The memorymanagement system can handle from a few entries to tens of millions ofentries with similar performance characteristics.

[0018]FIG. 1 is a block diagram of a memory management system 20 inaccordance with one embodiment of the invention. The memory managementsystem 20 has three main elements: a transform generator 22; acontroller 24 and a store (memory) 26. The transform generatordetermines an address 28 and a confirmer 30 from a key. The key is howthe data is stored and looked up. For instance, a telephone informationservice would want a list of all the customer's names and telephonenumbers. An operator would look up a telephone by a customer's name. Thecustomer's name is the key and the telephone number may be theassociation.

[0019] The transform generator 22 receives the key and performs amathematical process that returns the address 28 and confirmer 30. Theaddress 28 and confirmer 30 together are called the icon or transform ofthe key. The ideal mathematical operation provides an even distributionof addresses even when the keys are not evenly distributed. In addition,the ideal mathematical operation does not result in a collision (sameaddress and same confirmer) for different keys. Any mathematicaloperation that meets these criteria is acceptable. However, othermathematical operations may also be acceptable. One polynomial code thatperforms well against these criteria is (1E543279765927881).

[0020] The controller 24 stores or looks up an association 32 based onthe address 28 and confirmer 30. The store 26 contains the confirmerlocation 30, a forward pointer location 34, a primary flag 36 and anallocated flag 38. A lookup command requires the controller to determinea first address (lookup address) and first confirmer (lookup confirmer)upon receiving a first key. The controller then determines if anallocated flag is set. When the allocated flag is set, the controllercompares the first confirmer to a stored confirmer at the first address.When the stored confirmer and the first confirmer are the same thecontroller reads a stored association. The purpose of these locationswill be explained in more detail with respect to FIGS. 2-8.

[0021]FIG. 2 is a schematic diagram of a memory store 50 in accordancewith one embodiment of the invention. The store 50 shows an example withsixteen addresses. Generally, the number of address available will bebased on a factor of two, for instance, 8, 16, 32, etc. The store 50 ismerely a simple example to demonstrate how a store is initialized. Inthe example, the confirmer locations 52 contain a reverse pointer 54.The confirmer location 52 for address one is shown as zero. The forwardpointer locations 56 each contain a forward pointer 58. The primary flaglocations 60 are shown as zero's (unset). However, the primary flaglocations 60 are free until an entry has been stored at the address. Theallocated flag locations 62 are initialized to zero (unset). Theassociation locations 64 are free and have no entries in this example.Note that an association is not required for the invention. In oneembodiment the reverse pointer 54 is stored in a combination of freelocations 52, 60, 64. The free locations upon initialization are theconfirmer location 52, the primary flag location 60 and the associationlocation 64.

[0022] The initialization process requires specifying a store 50 havinga plurality of addresses 66. A confirm location 52 is defined for theeach of the plurality of addresses 66. Next, a forward pointer location56 for each of the addresses is defined. A forward address pointer 58 isentered for the forward pointer location for each of the plurality ofaddresses. The primary flag location 60 and allocated flag location 62are defined for each of the addresses 66. An association location 64 isdefined for each of the addresses. A reverse address pointer 54 is thenentered in a free location for each of the addresses 66. As a result wehave a doubly linked free list (forward and reverse pointers).

[0023]FIG. 3 is a schematic diagram of a memory store 50 in accordancewith one embodiment of the invention. The figure illustrates a store ataddress five 70 assuming an initial state shown in FIG. 2. When thecontroller receives a store request, it sends a key to the transformgenerator. The transform generator returns an address (store address)and a confirmer (store confirmer). The controller then proceeds to storean association and confirmer at the address. The storing processrequires that the controller first determines if the allocate flag 62 isset at the one of the plurality of address returned by the transformgenerator. When the allocated flag is not set, the controller moves to areverse address indicated by the reverse pointer address. In the figureswe see that the allocated flag 72 is not set for address five (firstaddress) 70 in FIG. 2. As a result we can store an association ataddress five 70. The reverse address pointer 74 at address five 70 isaddress four 76. Thus we move to address four (reverse address) 76 andupdate the forward pointer at address four 76 to equal the forwardpointer at address five 70. Thus we see that the forward pointer 78(FIG. 3) at address four 76 is six. Address six is the next (forward)free address. Next the controller moves to the forward address 80pointed to by the forward pointer 82 at the address five 70 (See FIG.2). At address six (forward address) 80 we set the reverse pointer 84equal to the reverse pointer 74 at address five 70. Next the confirmer(C1, first confirmer) 86 is entered at confirmer location 52 for theaddress five 70. The forward pointer 88 is set to point to address five.When there are no collisions, the forward pointer of a used addresspoints to itself. The primary flag 90 and the allocated flag 92 are set.The association (A1) 94 is stored in the association location foraddress five. The store 50 of FIG. 3 shows an example of the state ofstore 50 after a store operation at address five.

[0024]FIG. 4 is a schematic diagram of a memory store 50 in accordancewith one embodiment of the invention. FIG. 4 shows the state of store 50after a collision store at address five. FIG. 4 assumes that the initialstate of the store 50 before the collision store is shown in FIG. 3.Note that collisions are extremely rare when the appropriate polynomialcode is selected. However, collisions cannot be ruled out in all cases.The controller receives a key and association for store. The transformgenerator returns an address of five. The controller checks if theallocated flag 92 is set at address five 70. When the allocated flag 92is set, the controller determines if the primary flag 90 is set. Whenthe primary flag 90 is set, the controller moves to a next free address.The next address can be found by forward searching or backwardssearching. FIG. 4 shows an example where forward searching is used. Thecontroller moves to the next address (second address) 80 and determinesif the allocated flag is set. When the allocated flag is not set, thenthe address is the next free address. The next free address 80 isaddress six. The forward pointer 88 at address five is set to addresssix. The forward pointer 78 at address four is updated to equal theforward pointer at address six 80 (i.e., seven). The reverse pointer 100at address seven 102 is set equal to reverse pointer 84 at address six80. The confirmer (C2, second confirmer) 104 can then be stored ataddress six 60. The forward pointer 106 is set equal to five. Theallocated flag 108 is set and the association (A2) 110 is stored.

[0025]FIG. 5 is a schematic diagram of a memory store 50 in accordancewith one embodiment of the invention. FIG. 5 shows the state the store50 after “secondary collision” store at address six assuming that FIG. 4represents the initial condition of the store 50. The controllerreceives a key and an association for store. The transform generatorreturns the address six 80. The controller checks the allocated flag 108(FIG. 4) and determines that address six 80 is allocated. The controllerthen checks the primary flag 60 at address six 80 and determines thatthe primary flag is not set. This tells the controller that the store ataddress six 80 is a collision store, not a primary store. The controllerfinds a free address (i.e, address seven 102). A free address is anaddress in which the allocated flag 62 is not set. The informationstored at address six 80 (FIG. 80) needs to be moved to address seven102. First the reverse pointer 120 at address eight 122 has to beupdated to equal the reverse pointer at address seven 102 (FIG. 4). Nextthe forward pointer 78 at address four 76 has to be updated to be equalto the forward pointer at address seven 102 (FIG. 4). The contents(first confirmer, assocition) of address six 80 (FIG. 4) can now bemoved to address seven 102. The confirmer (C3) 124 and the association(A3) 126 are stored at address six 80. The forward pointer at addresssix 80 is update to be address six. The primary flag and the allocatedflag are set at address six. The forward pointer of address five 70 isupdated to read address seven 102.

[0026]FIG. 6 is a schematic diagram of a memory store 50 in accordancewith one embodiment of the invention. FIG. 6 shows the state of thestore 50 after a delete of the entry at address six assuming that FIG. 5shows the initial state of the store. The controller receives a deletecommand and a key. The transform generator determines a delete address(address six) and delete confirmer. The controller compares the deleteconfirmer to the stored confirmer (C3) at address six 80. When thestored confirmer (C3) is the same as the delete confirmer, the storedconfirmer 124 and the stored association 126 are deleted. Next theallocated flag 130 and the primary flag 132 are unset. The controllersearches for a next free address. In this case the next free address isaddress eight 122. The forward pointer 88 at the delete address 80(address six) is updated to the next free address 122. Note that thisexample uses a forward search for a free address, however a reversesearch is possible as will be apparent to those skilled in the art. Thereverse address pointer 134 at the delete address 80 is set equal to thereverse address at the next free address 122. The reverse address 136 atthe next free address 122 is set equal to the delete address (i.e,address six). The previous free address is found using the reverseaddress 120 (FIG. 5) at the next free address 122. The forward pointer138 at the previous free address is updated to equal the delete address80. The doubly linked free list now completely updated.

[0027]FIG. 7 is a schematic diagram of a memory store 50 in accordancewith one embodiment of the invention. FIG. 7 shows the state of thestore 50 after a delete of the entry at address seven 102 assuming thatFIG. 5 shows the initial state of the store. The controller receives adelete command and a key. The transform generator determines a deleteaddress (address seven) and delete confirmer. The controller comparesthe delete confirmer to the stored confirmer (C2) at address seven 102.When the stored confirmer (C2) is the same as the delete confirmer, thestored confirmer 104 and the stored association (A2) are deleted. Nextthe allocated flag 140 is unset. The controller searches for a next freeaddress (i.e., address eight 122). The controller then updates thereverse pointer 142 for the free address to equal the reverse pointer120 at the next free address 122. The controller then updates theforward pointer 144 at the delete address to equal the next freeaddress. The reverse pointer 146 of the next free address 122 is updatedto equal the delete address. A reverse address (address four 76) has itsforward address 148 updated to equal the delete address. The deleteoperation is complete.

[0028]FIG. 8 is a schematic diagram of a memory store 50 in accordancewith one embodiment of the invention. FIG. 8 shows the state of thestore 50 after a delete of the entry at address five 70 assuming thatFIG. 5 shows the initial state of the store. The controller receives adelete command and a key. The transform generator determines a deleteaddress (address five) and delete confirmer. The controller compares thedelete confirmer to the stored confirmer (C1) at address five 70. Whenthe stored confirmer (C1) is the same as the delete confirmer, thecontroller determines if the forward pointer 78 points to the deleteaddress 70. When the forward pointer 78, does not point to the deleteaddress (itself), then the controller moves the confirmer (C2) andassociation (A2) at the forward pointer address 102 to the deleteaddress 70. The forward pointer 150 at the delete address 70 is updatedto equal the delete address 70. A reverse pointer 152 at the forwardpointer address 102 is updated using the next free address 122 reversepointer 120. The forward pointer 154 at the forward pointer address 102is set equal to the next free address 122. The forward pointer 156 atthe reverse address 76 is set equal to the forward pointer address 102.The delete operation for a primary entry having a collision is nowcomplete.

[0029] Thus there has been described a method of operating a memorymanagement system that can be implemented in hardware or software andallows deletes of entries in an associative memory. The method andsystem provide a simple method of handling collisions that does notrequire extensive linked lists. This accomplished while providing theextremely fast lookup times of a CAM memory system. In addition, thesystem is very flexible and capable of handling from two entries to overa million entries, without significant performance degradation.

[0030]FIG. 9 is a schematic diagram of a memory store 200 in accordancewith one embodiment of the invention. FIGS. 9 & 10 illustrate theversatility of the store to handle different numbers of entries. FIG. 9shows an example of a store of the memory management system, when therequired number of entries (addresses) is 100 Million. The system uses atransform that has sixty-four bits (first number of bits). A portion ofthe sixty-four bits is used as the address and the other portion is usedas the confirmer. In this case the controller determines that therequired number of entries requires an address 202 having an addressnumber of bits equal to 27 bits. The forward pointer location 204 is setto have a forward pointer number of bits (twenty-seven) equal to theaddress number of bits. The confirmer location 206 is set to have aconfirmer number of bits equal (thirty-seven) to the first number ofbits (sixty-four-transform) less the forward pointer number of bits(twenty-seven). Note that the transform has to be large enough to coverthe required number of entries. Ideally, the transform will be largeenough (range of numbers) to cover more than the required number ofentries. The primary flag location 208 and the allocation flag location210 each requires one bit. The association 212 is optional, but in thisexample is shown as having thirty bits. Note that just to list all thepotential transforms would require sixty-four bits. The store 200without the optional association only requires sixty-six bits to storethe entries or two more bits than listing all the transforms.

[0031]FIG. 10 is a schematic diagram of a memory store 200 in accordancewith one embodiment of the invention. In this example, the store 200needs to be able to handle 10 billion entries. As a result the address202 is thirty-four bits. The forward pointer 204 is also set tothirty-four bits. The confirmer 206 is therefore set to have thirtybits. The size of the confirmer and forward pointer are traded to bestaccommodate and required number of entries. Note that the overall storeis still ninety-six bits wide.

[0032] Thus there has been described a memory management system thatonly requires two bits more than just listing the transform. The memorymanagement system is capable trading the confirmer size and forwardpointer size to accommodate almost any number or entries.

[0033] The methods described herein can be implemented ascomputer-readable instructions stored on a computer-readable storagemedium that when executed by a computer will perform the methodsdescribed herein.

[0034] While the invention has been described in conjunction withspecific embodiments thereof, it is evident that many alterations,modifications, and variations will be apparent to those skilled in theart in light of the foregoing description. Accordingly, it is intendedto embrace all such alterations, modifications, and variations in theappended claims.

What is claimed is:
 1. A method of operating a memory management system,comprising the steps of: (a) specifying a store having a plurality ofaddresses; (b) defining a confirmer location for each of the pluralityof addresses; (c) defining a forward pointer location for each of theplurality of addresses; (d) entering a forward address pointer in theforward pointer location for each of the plurality of address; (e)defining a primary flag for each of the plurality of addresses; (f)defining an allocated flag, for each of the plurality of addresses; (g)defining an association for each of the plurality of address; and (h)entering a reverse address pointer in a free location for each of theplurality of addresses.
 2. The method of claim 1, further including thesteps of: (i) receiving a key for storage; (j) performing a transform onthe key to determine one of the plurality of addresses and a confirmer;(k) determining if the allocated flag is set for the one of theplurality of addresses; (l) when the allocated flag is not set, movingto a reverse address indicated by the reverse pointer address; (m)updating the forward pointer address at the reverse address to equal theforward pointer address at the one of the plurality of addresses.
 3. Themethod of claim 2, further including the steps of: (n) moving to aforward address indicated by the forward pointer address; (o) updatingthe reverse pointer address at the forward address to equal the reversepointer address at the one of the plurality of addresses.
 4. The methodof claim 3, further including the steps of: (p) entering the confirmerfor the key at the confirmer location for the one of the plurality ofaddresses; (q) setting the forward pointer address at the one of theplurality of addresses to the one of the plurality of addresses; (r)setting the allocated flag for the one of the plurality of addresses;(s) setting the primary flag for the one of the plurality of addresses.5. The method of claim 2, further including the steps of: (n) when theallocated flag is set for the one of the plurality of addresses,determining if the primary flag is set for the one of the plurality ofaddresses; (o) when the primary flag is set, moving to a next address;(p) determining if the allocated flag is set at the next address; (q)when the allocated flag is not set, entering the confirmer in theconfirmer location of the next address; (r) setting the forward pointeraddress of the next address equal to the one of the plurality ofaddresses; (s) setting the allocated flag at the next address.
 6. Themethod of claim 5, further including the step of: (t) setting theforward pointer address of the one of the plurality of addresses to thenext address.
 7. The method of claim 5, wherein step (q) furtherincludes the steps of: (q1) moving to a reverse address indicated by thereverse pointer address of the next address; (q2) updating the forwardpointer address at the reverse address to equal the forward pointeraddress at the next address. (q3) moving to a forward address indicatedby the forward pointer address of the next address; (q4) updating thereverse pointer address at the forward address to equal the reversepointer address at the next address.
 8. The method of claim 5, furtherincluding the steps of: (t) when the primary flag is not set for the oneof the plurality of addresses, finding a free address; (u) moving afirst confirmer from the one of the plurality of addresses to theconfirmer location of the free address; (v) setting the forward pointerof the free address equal to the forward pointer for the one of theplurality of addresses; (w) setting the allocated flag for the freeaddress.
 9. The method of claim 8, further including the steps of: (x)entering the confirmer in the confirmer location of the one of theplurality of addresses; (y) setting the forward pointer of the one ofthe plurality of addresses equal to the one of the plurality ofaddresses; (z) setting the primary flag.
 10. A memory management systemcomprising: a transform generator capable of generating an address and aconfirmer from a key; a controller connected to the transform generatorand sending the key to the transform generator and receiving the addressand the confirmer; and a store connected to the controller has aplurality of addresses, each of the plurality of addresses having aconfirmer location, a forward pointer location, a primary flag, anallocated flag and an association location.
 11. The memory managementsystem of claim 10, wherein a free list of addresses includes a reversepointer in one of the confirmer location, the association location orprimary flag of each of the free list of addresses and a forward pointerin the forward pointer location of each of the free list of addresses.12. The memory management system of claim 11, wherein the controller hasthe transform generator determine a first address and a first confirmerupon receiving a first key.
 13. The memory management system of claim12, wherein the controller determines if an allocated flag is set at thefirst address when the controller receives a lookup command, when theallocated flag is set, the controller determines if the primary flag isset, comparing the first confirmer to a stored confirmer at the firstaddress, when the first confirmer and the stored confirmer are the same,reading a stored association at the first address.
 14. A method ofoperating a memory management system, comprising the steps of: (a)receiving a key and a command; (b) when the command is a lookup command;(c) determining a lookup confirmer and a lookup address from the key;(d) determining if an allocated flag is set at the lookup address of astore; (e) when the allocated flag is set, comparing the lookupconfirmer with the stored confirmer at the lookup address; and (f) whenthe lookup confirmer and the stored confirmer are a same, reading anassociation at the lookup address.
 15. The method of claim 14, furtherincluding the steps of: (g) when the lookup confirmer and the storedconfirmer are not the same, moving to a second address pointed to by theforward pointer at the lookup address; (h) determining if a secondconfirmer at the second address is the same as the lookup confirmer; (i)when the second confirmer and the lookup confirmer are the same, readingan association at the second address.
 16. The method of claim 14,further including the steps of: (g) when the command is a deletecommand, determining a delete address and a delete confirmer using thekey; (h) comparing a stored confirmer at the delete address to thedelete confirmer; (i) when the stored confirmer is the same as thedelete confirmer, deleting the stored confirmer and the storedassociation at the delete address.
 17. The method of claim 16, furtherincluding the steps of: (j) unsetting the allocated flag and the primaryflag.
 18. The method of claim 17, further including the steps of: (k)searching for a next free address having an unset allocated flag; (m)setting a forward pointer at the delete address equal to the next freeaddress; (n) setting the confirmer of the delete address equal to thereverse pointer at the next free address; (o) setting a confirmer at thenext free address equal to the delete address; (p) moving to a previousfree address using the confirmer at the delete address; (q) setting aforward pointer at the previous address equal to the delete address. 19.The method of claim 14, further including the steps of: (g) when thecommand is a store command, determining a store address and a storeconfirmer using the key; (h) determining if an allocated flag is set atthe store address; (i) when the allocated flag is not set at the storeaddress, storing the store confirmer at a confirmer location for thestore address; (j) storing an association in an association location forthe store address; (k) setting the allocated flag for the store address;(l) setting the primary flag for the store address.
 20. The method ofclaim 19, further including the step of: (m) setting a forward pointerat the store address equal to the store address.
 21. The method of claim20, wherein step (I) further includes the steps of: (i1) moving to areverse address indicated by the reverse pointer address at the storeaddress; (i2) updating the forward pointer address at the reverseaddress to equal the forward pointer address at the store address; (i3)moving to a forward address indicated by the forward pointer address atthe store address; (i4) updating the reverse pointer address at theforward address to equal the reverse pointer address at the storeaddress.
 22. The method of claim 19, further including the steps of: (m)when the allocated flag is set at the store address, determining if aprimary flag is set; (n) when the primary flag is set, moving to a nextfree address; (o) setting a forward pointer at the store address equalto the next free address; (p) moving to a reverse address pointed to bya reverse address pointer at the next free address; (q) setting aforward pointer address at the reverse address equal to a forwardpointer address at the next free address; (r) moving to a forwardaddress pointed to by a forward address pointer at the next freeaddress; (s) setting a reverse pointer address at the forward addressequal to a reverse pointer address at the next free address.
 23. Themethod of claim 19, further including the steps of: (t) storing thestore confirmer at a confirmer location for the next free address; (j)storing an association in an association location for the next freeaddress; (k) setting the allocated flag for the next free address. 24.The method of claim 22, further including the steps of: (t) when theprimary flag is not set at the store address, determining a next freeaddress; (w) moving to the reverse address pointed to by the reverseaddress pointer at the next free address; (x) setting the forwardpointer address at the reverse address equal to the forward pointeraddress at the next free address; (y) moving to the forward addresspointed to by the forward address pointer at the next free address; (z)setting the reverse pointer address at the forward address equal to thereverse pointer address at the next free address.
 25. The method ofclaim 24, further including the steps of: (aa) setting a forward pointeraddress at the primary address pointed to by the forward pointer addressof the store address equal to the next free address; (ab) setting aconfirmer at the next free address equal to a stored-confirm at thestore address; (ac) setting a forward pointer at the next free addressequal to the forward pointer address at the store address; (ad) settingan allocated flag at the next free address.
 26. The method of claim 25,further including the steps of: (af) storing a store confirmer in aconfirmer location of the store address; (ag) setting the forwardpointer at the store address equal to the store address; (ah) settingthe allocated flag and the primary flag; (aj) storing the storeassociation in an association location of the store address.
 27. Amethod of operating a memory management system, comprising the steps of:(a) determining a number of required entries; (b) selecting a transformhaving a first number of bits; (c) determining an address number of bitsrequired to cover all the number of required entries; (d) setting aforward pointer number of bits equal to the address number of bits; and(e) setting a confirmer number of bits equal to the first number of bitsless the forward pointer number of bits.
 28. The method of claim 27,wherein a range of numbers defined by the first number of bits isgreater than the number of required entries.
 29. The method of claim 27,further including the steps of: (f) entering a forward address pointerin a forward pointer location; (g) entering a reverse address pointer ina free location.
 30. The method of claim 29, further including the stepof: (h) defining a primary flag for each of a plurality of address; (i)defining an allocated flag for each of the plurality of address.
 31. Themethod of claim 30, further including setting, the allocated flag to anunallocated state.
 32. A memory management system comprising: atransform generator capable of generating an address and a confirmerfrom a key; a controller connected to the transform generator andsending the key to the transform generator and receiving the address andthe confirmer; and a store having a plurality of addresses, each of theplurality of addresses having a confirmer location, a forward pointerlocation, a primary flag, and an allocated flag.
 33. The memorymanagement system of claim 32 wherein a number of address bits is equalto a number of confirmer bits plus a number of forward pointer bits.